7490 - Decade and Binary Counters DM7490A Decade and Binary Counters
August 1986 Revised March 2000
DM7490A Decade and Binary Counters
The DM7490A monolithic counter contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five. The counter has a gated zero reset and also has gated setto-nine inputs for use in BCD nine’s complement applications. To use the maximum count length (decade or four-bit binary), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate Function Table. A symmetrical divide-by-ten count can be obtained from the counters by connecting the QD output to the A input and applying the input count to the B input which gives a divideby-ten square wave at output QA.
s Typical power dissipation 145 mW s Count frequency 42 MHz
Order Number DM7490AN Package Numbe